|
MPEG/JPEG Co-Processor and Integrated Video Processing Subsystem
Offered at a very low price point, the
new TMS320DM355 DaVinci™ processor
from Texas Instruments enables developers
to easily and quickly create lowcost
portable video devices with HD
capability. Target applications include
digital cameras, IP video cameras and
video baby monitors.
The TMS320DM355 consists of an integrated
video processing subsystem, a
MPEG4/JPEG co-processor (MJCP), an
ARM926EJ-S core and a wide range of
peripherals. The new device is supported by
TI´s corresponding development tool, the
“DVEVM” (DM355 Digital Video Evaluation
Module).
High Flexibility
Designed to offer electronics manufacturers
the ability to develop affordable portable
video solutions and quickly launch their products
into the fast-growing HD market segment,
the new DaVinci processor combines
high performance, high picture quality, low
power consumption and low price.
The TMS320DM355 enables seamless interfacing
to most additional external devices
required for a complete digital camera implementation.
The interface is flexible enough
to support various types of CCD and CMOS
image sensors, signal conditioning circuits,
power management, DDR/mDDR memory,
SRAM, NAND, shutter, Iris and autofocus
motor controls etc.
ARM926EJ-S Core
The processor core is an ARM926EJ-S,
a high-performance 32-bit RISC core, that
incorporates:
| > |
A CP15 co-processor and protection
module |
| > |
Data and program MMUs (Memory
Management Units) with table look-aside
buffers |
| > |
Separate instruction and data caches
(16 KB and 8 KB); both are four-way
associative with VIVT (Virtual Index Virtual
Tag) |
DM355 performance is enhanced by its
MPEG/JPEG co-processor. The MPEG/JPEG
co-processor performs the computational
operations required for image processing,
JPEG compression and MPEG1,2,4 video and
imaging standards.
In addition, the DM355 features a video processing
subsystem with a video processing
front-end (VPFE) and a video processing
back-end (VPBE); both are configurable. The
VPFE port provides an interface for CCD/CMOS imager modules and video decoders.
The VPBE provides hardware On Screen Display
(OSD) support and composite NTSC/PAL
and digital LCD output.
The DM355 peripheral
set includes:
| > |
An I²C bus interface, two ASPs (Audio
Serial Ports), three SPIs |
| > |
Three UARTs, one with hardware handshaking
support |
| > |
An USB 2.0 interface (device/host, full
and high-speed) |
| > |
Three 64-bit general-purpose timers,
one 64-bit watchdog timer |
| > |
Two external memory interfaces:
1x asynchronous (AEMIF) for slower
memories/peripherals such as NAND and
OneNAND, 1x high-speed synchronous for
DDR2/mDDR |
| > |
Up to 104 GPIOs with programmable
interrupt/event generation modes |
The new DaVinci™ processor is available in
clock speeds of up to 216 MHz or 270 MHz,
which allows for a scalable line of products.
Developers can re-use intellectual property
from the DaVinci™ portfolio or leverage IP
from the vast open-source resources for
ARM-based processing to speed them
throughout the development process.
Additional Information
For detailed specifications please contact
your local SPOERLE Branch Office or visit
www.ti.com/dm355
|
